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IEEE Transactions on Computers
Performance of the hyper-ring multicomputer
SAC '98 Proceedings of the 1998 ACM symposium on Applied Computing
IEEE Transactions on Computers
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IEEE Transactions on Computers
Route packets, not wires: on-chip inteconnection networks
Proceedings of the 38th annual Design Automation Conference
Interconnection Networks: An Engineering Approach
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Performance Evaluation of the Slotted Ring Multiprocessor
IEEE Transactions on Computers
IEEE Transactions on Parallel and Distributed Systems
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ASYNC '03 Proceedings of the 9th International Symposium on Asynchronous Circuits and Systems
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ICCD '03 Proceedings of the 21st International Conference on Computer Design
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Journal of Systems Architecture: the EUROMICRO Journal - Special issue: Networks on chip
Principles and Practices of Interconnection Networks
Principles and Practices of Interconnection Networks
Performance Evaluation and Design Trade-Offs for Network-on-Chip Interconnect Architectures
IEEE Transactions on Computers
Express virtual channels: towards the ideal interconnection fabric
Proceedings of the 34th annual international symposium on Computer architecture
A Hybrid Ring/Mesh Interconnect for Network-on-Chip Using Hierarchical Rings for Global Routing
NOCS '07 Proceedings of the First International Symposium on Networks-on-Chip
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IEEE Design & Test
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Proceedings of the 19th ACM Great Lakes symposium on VLSI
Indirect adaptive routing on large scale interconnection networks
Proceedings of the 36th annual international symposium on Computer architecture
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IEEE Communications Magazine
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A popular network topology for Network-on-Chip (NoC) implementations is the two-dimensional mesh, which has its drawbacks in the communication latency scalability, and the concentration of the traffic in the center of the mesh. In this paper, we consider the addition of simple and hierarchical rings to the mesh network. We propose several composite topologies that use the ring networks to reduce hop counts and latencies of global (long distance) traffic. Furthermore, we study two alternative ring architectures. The first is a slotted ring architecture that is suitable for NoC implementation due to its simplicity and low cost. The second uses wormhole routing and virtual channels, providing increased flexibility and better performance. Simulation results show that the composite architectures decrease the latencies and hop counts incurred by global traffic, thereby validating our claim that the use of hierarchical rings for global routing can in fact increase the scalability of the normal mesh network used for NoC implementations.