Digital system design using field programmable gate arrays
Digital system design using field programmable gate arrays
Self-Checking of FPGA-Based Control Units
GLS '99 Proceedings of the Ninth Great Lakes Symposium on VLSI
Self-checking sequential circuits with self-healing ability
Proceedings of the 12th ACM Great Lakes symposium on VLSI
On implementation of online testable state machines
ICC'09 Proceedings of the 13th WSEAS international conference on Circuits
| Hi-index | 0.00 |
We deal with the problem of a self-checking FSM design with observing only FSM outputs. We suggest a special PLA description of the FSM behavior that is well suited for a practice. It is established that a factorized multilevel synthesis method applied to this PLA description and followed by the gate implementation provides observing only FSM outputs. We assume that a set of faults considered does not demand introducing additional FSM input lines. We also propose a mathematical tool that makes possible for any synthesis method applied to this special PLA description to clarify a possibility of observing only FSM outputs.