Delay optimization of combinational static CMOS logic
DAC '87 Proceedings of the 24th ACM/IEEE Design Automation Conference
Digital integrated circuits: a design perspective
Digital integrated circuits: a design perspective
Self-checking and fault-tolerant digital design
Self-checking and fault-tolerant digital design
Self-checking sequential circuits with self-healing ability
Proceedings of the 12th ACM Great Lakes symposium on VLSI
A Methodology for Designing Optimal Self-Checking Sequential Circuits
Proceedings of the IEEE International Test Conference on Test: Faster, Better, Sooner
Self-Checking FSM Design with Observing only FSM Outputs
IOLTW '00 Proceedings of the 6th IEEE International On-Line Testing Workshop (IOLTW)
A Unified Scheme for Designing Testable State Machines
ATS '01 Proceedings of the 10th Asian Test Symposium
Principles of Modern Digital Design
Principles of Modern Digital Design
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During the last two decades, significant amount of research has been performed to simplify the detection of transient or soft errors in VLSI-based digital systems. This paper proposes an approach for implementing state machines that uses 2-hot code for state encoding. State machines designed using this approach allow online detection of soft errors in registers and output logic. The 2-hot code considerably reduces the number of required flip-flops and leads to relatively straightforward implementation of next state and output logic. A new way of designing output logic for online fault detection has also been presented.