Principles of CMOS VLSI design: a systems perspective
Principles of CMOS VLSI design: a systems perspective
Testable Realizations for FET Stuck-Open Faults in CMOS Combinational Logic Circuits
IEEE Transactions on Computers
IDDQ Testing: Issues Present and Future
IEEE Design & Test
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Domino circuits are increasingly popular because they offer a significant performance boost over static ones. An inherent problem with domino CMOS gates is that under specific input conditions the charge redistribution between parasitic capacitances at internal nodes of the circuit can destroy the noise margin and cause glitches at the output of a domino gate.Among the dominant solutions proposed, in the open literature, to overcome this problem is the technique of internal nodes multiple precharging. However the added precharge transistors are not testable for stuck-open and stuck-on faults. Undetectable stuck-open faults on these transistors cause reduction of the noise margins of the gate. Then the operation of the circuit in the field is sensitive to environmental factors, such as noise. In this paper we propose a new internal nodes multiple precharging scheme that leads to testable designs for stuck-open and stuck-on faults.