CAD for nanometer silicon design challenges and success
IEEE Transactions on Very Large Scale Integration (VLSI) Systems - Nanoelectronic circuits and systems
Global signaling over lossy transmission lines
ICCAD '05 Proceedings of the 2005 IEEE/ACM International conference on Computer-aided design
Optimization of driver preemphasis for on-chip interconnects
IEEE Transactions on Circuits and Systems Part I: Regular Papers
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Inductance associated with on-chip wires can nolonger be ignored as chip operation frequenciesincrease into GHz regime. Because the magnetic fieldpropagates a very long range, the extraction of wireinductance is not just dependent on the immediateneighboring environment. This paper discusses thevarious difficulties of extracting inductance ofrandomly placed wires in a typical chip environment.With dedicated return path, the wire inductance can becontrolled and benefit the design of high-speedcircuits. Specific examples are illustrated.