Minimal-power, delay-balanced smart repeaters for interconnects in the nanometer regime
Proceedings of the 2006 international workshop on System-level interconnect prediction
A path based modeling approach for dynamic power estimation
Proceedings of the 17th ACM Great Lakes symposium on VLSI
A timing dependent power estimation framework considering coupling
Proceedings of the 2006 IEEE/ACM international conference on Computer-aided design
A timing-dependent power estimation framework considering coupling
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
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Conventional power estimation techniques are prone to manysources of error. With increasing dominance of coupling capacitances,capacitive coupling potentially contributes significantly toUDSM power consumption. We analyze potential sources of inaccuracyin power estimation, focusing on those due to coupling.Our results suggest that traditional power estimates can be off byas much as 50%.