Quantifying Error in Dynamic Power Estimation of CMOS Circuits

  • Authors:
  • Puneet Gupta;Andrew B. Kahng

  • Affiliations:
  • -;-

  • Venue:
  • ISQED '03 Proceedings of the 4th International Symposium on Quality Electronic Design
  • Year:
  • 2003

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Abstract

Conventional power estimation techniques are prone to manysources of error. With increasing dominance of coupling capacitances,capacitive coupling potentially contributes significantly toUDSM power consumption. We analyze potential sources of inaccuracyin power estimation, focusing on those due to coupling.Our results suggest that traditional power estimates can be off byas much as 50%.