A path based modeling approach for dynamic power estimation

  • Authors:
  • Prashant Agrawal;Srinivasa R. STG;Ajit N. Oke;Saurabh Vijay

  • Affiliations:
  • Indian Institute of Technology Kharagpur, Kharagpur, India;Intel Technology India (P) Ltd., Bangalore, India;Intel Technology India (P) Ltd., Bangalore, India;Intel Technology India (P) Ltd., Bangalore, India

  • Venue:
  • Proceedings of the 17th ACM Great Lakes symposium on VLSI
  • Year:
  • 2007

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Abstract

In this paper a path based modeling approach due to different internal traffic scenarios is proposed for dynamic power estimation, under Thermal Design Power (TDP) conditions, for data path intensive designs. The model estimates power as a function of bandwidth and effective toggle rate of the input data transactions. It also takes into account the effect of cross-coupling capacitance on dynamic power. The model scales well to obtain power estimates for a design which is a proliferation of the existing one. This enables to get an early power estimation for a next generation design. The effectiveness of the proposed modeling approach has been demonstrated on a complex industrial design.