Digital image processing (2nd ed.)
Digital image processing (2nd ed.)
Computer arithmetic systems: algorithms, architecture and implementation
Computer arithmetic systems: algorithms, architecture and implementation
Low-Area/Power Parallel FIR Digital Filter Implementations
Journal of VLSI Signal Processing Systems
Architectures for Digital Signal Processing
Architectures for Digital Signal Processing
EUROMICRO '98 Proceedings of the 24th Conference on EUROMICRO - Volume 1
System Comparison of Electronic and Optical Correlator
Journal of Signal Processing Systems
Hi-index | 0.00 |
In this paper, different architectures for real time image constant coefficient convolutions will be considered. Accordingly, Look-Up-Table (LUT) based Multiplication/Convolution, LUT based Distributed Arithmetic (DA) Convolution and Multiplierless Convolution (MC) implementations into FPGA structures has been investigated. In a result, the choice between these architectures depends on given coefficients values, however in most cases the MC preferable. Furthermore, the change of coefficient values in real time systems is also considered. This work is a contribution to worldwide intense research on developing reconfigurable and user dedicated Custom Computing Machines (CCM).