CORDIC Architectures with Parallel Compensation of the Scale Factor
ASAP '95 Proceedings of the IEEE International Conference on Application Specific Array Processors
A High Speed Hough Transform Using CORDIC
A High Speed Hough Transform Using CORDIC
Exploiting inherent parallelisms for accelerating linear Hough transform
IEEE Transactions on Image Processing
Parametric architecture for function calculation improvement
ARCS'07 Proceedings of the 20th international conference on Architecture of computing systems
Improvement of image transform calculation based on a weighted primitive
ICIAR'06 Proceedings of the Third international conference on Image Analysis and Recognition - Volume Part I
Resource-efficient FPGA architecture and implementation of hough transform
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
| Hi-index | 0.00 |
Recent developments in reconfigurable hardware technologies have offered high-density high-speed devices with the ability for custom computing whilst maintaining the flexibility of a software solution. These features are well suited to image processing algorithms that are computationally intensive and repetitive in nature. Very deep pipelining and parallelism, features often required for real time image analysis can be achieved easily using hardware design. The Hough Transform is a powerful and robust global image processing tool for feature recognition and detection. The CORDIC algorithm uses simple shift and addition operations to implement complex trigonometric functions. This paper combines the application of the novel CORDIC algorithm to the Hough Transform and reconfigurable technology to propose a parameterisable Hough Transform with real-time processing throughput.