An analytic optimization technique for placement of macro-cells

Authors:
A. Herrigel;W. Fichtner
Affiliations:
Integrated System Laboratory, Swiss Federal Institute of Technology Zurich, Gloriastrasse 35, 8092 Zurich, Switzerland;Integrated System Laboratory, Swiss Federal Institute of Technology Zurich, Gloriastrasse 35, 8092 Zurich, Switzerland
Venue:
DAC '89 Proceedings of the 26th ACM/IEEE Design Automation Conference
Year:
1989

Citing 6
Cited 3

Constrained global optimization: algorithms and applications

Constrained global optimization: algorithms and applications
Practical methods of optimization; (2nd ed.)

Practical methods of optimization; (2nd ed.)
ALSO: a system for chip floorplan design

Integration, the VLSI Journal
An analytical algorithm for placement of arbitrarily sized rectangular blocks

DAC '85 Proceedings of the 22nd ACM/IEEE Design Automation Conference
Two-dimensional compaction by “zone refining”

DAC '86 Proceedings of the 23rd ACM/IEEE Design Automation Conference
Optimization techniques for two-dimensional placement

DAC '84 Proceedings of the 21st Design Automation Conference

VLSI cell placement techniques

ACM Computing Surveys (CSUR)
A genetic algorithm for macro cell placement

EURO-DAC '92 Proceedings of the conference on European design automation
MMP: a novel placement algorithm for combined macro block and standard cell layout design

ASP-DAC '00 Proceedings of the 2000 Asia and South Pacific Design Automation Conference

Quantified Score

Hi-index	0.00

Visualization

Abstract

This paper discusses the placement of R (rectangular) or L-shaped blocks, such as in macro-cell design. We present a new analytic approach that simultaneously accounts for different criteria (wire length, chip area). We characterize a solution by the associated adjacency graph [1] and derive an optimization technique with an active set method [2]. Results on a test problem are given to prove the performance and feasibility of this technique.