Pentium 4 Performance-Monitoring Features
IEEE Micro
Reducing State Loss For Effective Trace Sampling of Superscalar Processors
ICCD '96 Proceedings of the 1996 International Conference on Computer Design, VLSI in Computers and Processors
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HPCA '97 Proceedings of the 3rd IEEE Symposium on High-Performance Computer Architecture
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ICCD '01 Proceedings of the International Conference on Computer Design: VLSI in Computers & Processors
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IEEE Transactions on Computers
Speed versus Accuracy Trade-Offs in Microarchitectural Simulations
IEEE Transactions on Computers
Finding representative workloads for computer system design
Finding representative workloads for computer system design
Reducing TPC-H benchmarking time
PCI'05 Proceedings of the 10th Panhellenic conference on Advances in Informatics
A space-efficient on-chip compressed cache organization for high performance computing
ISPA'04 Proceedings of the Second international conference on Parallel and Distributed Processing and Applications
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In this paper we have compared the accuracy and representativeness of two common approaches (namely, fast forwarding and reduced input datasets) employed in current architectural studies to deal with the extremely long times involved in detailed architectural simulations. The experimental methodology chosen to perform the validation of both techniques consists in direct execution and performance monitoring through hardware performance counters, our study being focused on the nine SPECint benchmarks for which a reduced input dataset version exists. As a target system we have opted to use an Intel Pentium-4 microprocessor due to its remarkable monitoring features. The results obtained suggest that both techniques are similar, i.e. in some cases Fast-forward is preferable and vice versa, whereas for some benchmarks neither of the techniques are able to provide satisfactory results. However, the simulation cost associated with the fast-forwarding technique is about two orders of magnitude lower than that corresponding to reduced input datasets.