A Method for Measuring the Cycle-to-Cycle Period Jitter of High-Frequency Clock Signals

Authors:
Takahiro J. Yamaguchi;Masahiro Ishida;Mani Soma;David Halter;Rajesh Raina;Jim Nissen
Affiliations:
-;-;-;-;-;-
Venue:
VTS '01 Proceedings of the 19th IEEE VLSI Test Symposium
Year:
2001

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Abstract

This paper introduces the extended 驴Fmethod for measuring cycle-to-cycle period jitter in PLL outputs. The theoretical basis for this method is derived from the limited condition for the average period and analytic signal theory. Sinusoidal jitter measurements verify the relationship between cycle-to-cycle period jitter and timing jitter. To validate the method, experimental data from jitter measurements on a PowerPCTM microprocessor is analyzed in the frequency domain. Comparisons of phase quantization errors are made between the extended 驴Fmethod and the conventional zero-crossing method.