A Self Calibrated ADC BIST Methodology

Authors:
Hung-kai Chen;Chih-hu Wang;Chau-chin Su
Affiliations:
-;-;-
Venue:
VTS '02 Proceedings of the 20th IEEE VLSI Test Symposium
Year:
2002

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Abstract

A self calibrated BIST methodology is proposed to overcome the process variation of the BIST circuitry. Two test methods are proposed, one by statistical analysis and another by curve fitting. Test hardware is built by discrete components to emulate the ADC BIST circuitry. Experimental results verify the feasibility of the methodology.