Design of a High-Speed Square Generator
IEEE Transactions on Computers
Implementing Multiplication with Split Read-Only Memory
IEEE Transactions on Computers
Partial product reduction by using look-up tables for M×N multiplier
Integration, the VLSI Journal
| Hi-index | 14.99 |
Table look-up is an attractive approach to implementing multiplication; however, the size of the requisite multiplication table is prohibitively large for wide operands. A novel transformation which reduces the number of table entries from 2/sup 2b/ to 2/sup b/, where b is the width of the operands, is presented. Two implementation schemes are presented.