Residue number system arithmetic: modern applications in digital signal processing
Residue number system arithmetic: modern applications in digital signal processing
An Approach to Implementing Multiplication with Small Tables
IEEE Transactions on Computers
Design of a High-Speed Square Generator
IEEE Transactions on Computers
Partial product reduction by using look-up tables for M×N multiplier
Integration, the VLSI Journal
| Hi-index | 14.98 |
In look-up table-based multiplication schemes, techniques based on tables of squares require less memory than techniques based on direct implementations. In this paper, we present a method to realize an n-bit multiplier using a table of squares for n-bit integers. A new technique to store tables of squares is also presented. The new scheme is shown to compare favorably, in terms of storage requirements, with a scheme wherein the entire table of squares is stored directly. The addressing requirements of the new storage technique are also discussed.