Proceedings of the 36th annual ACM/IEEE Design Automation Conference
Verisym: Verifying Circuits by Symbolic Simulation
Formal Methods in System Design
Bit-Level Abstraction in the Verfication of Pipelined Microprocessors by Correspondence Checking
FMCAD '98 Proceedings of the Second International Conference on Formal Methods in Computer-Aided Design
Exploring structural symmetry automatically in symbolic trajectory evaluation
Formal Methods in System Design
| Hi-index | 0.00 |