A flexible statistical model for CAD of submicrometer analog CMOS integrated circuits
ICCAD '93 Proceedings of the 1993 IEEE/ACM international conference on Computer-aided design
Systematic Width-and-Length Dependent CMOS Transistor Mismatch Characterization and Simulation
Analog Integrated Circuits and Signal Processing - Special issue on low voltage/low power design
Layout Dependent Matching Analysis of CMOS Circuits
Analog Integrated Circuits and Signal Processing - Analog circuit techniques and related topics
Current Mirror Layout Strategies for Enhancing Matching Performance
Analog Integrated Circuits and Signal Processing - Special issue on the 1998 and 1999 midwest symposia on circuits and systems
Statistical Modeling for Computer-Aided Design of MOS VLSI Circuits
Statistical Modeling for Computer-Aided Design of MOS VLSI Circuits
Mismatch Modeling and Simulation—A Comprehensive Approach
Analog Integrated Circuits and Signal Processing
Parametric Yield Optimization of MOS IC's Affected by Device Mismatch
Analog Integrated Circuits and Signal Processing
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In this paper a novel CAD methodology for yield enhancement of VLSI CMOS circuits including random device variations is presented. The methodology is based on a preliminary characterization of the technological process by means of specific test chips for accurate mismatch modeling. To this purpose, a very accurate position-dependent parameter mismatch model has been formulated and extracted. Finally a CAD tool implementing this model has been developed. The tool is fully integrated in an environment of existing commercial tools and it has been experimented in the STMicroelectronics Flash Memory CAD Group.As an example of application, a bandgap reference circuit has been considered and the results obtained from simulations have been compared with experimental data. Furthermore, the methodology has been applied to the read path of a complex Flash Memory produced by STMicroelectronics, consisting of about 16,000 MOSFETs. Measurements of electrical performances have confirmed the validity of the methodology, and the accuracy of both the mismatch model and the simulation flow.