Illegal state space identification for sequential circuit test generation
DATE '99 Proceedings of the conference on Design, automation and test in Europe
Sequential Test Generation with Advanced Illegal State Search
Proceedings of the IEEE International Test Conference
Complete Search in Test Generation for Industrial Circuits with Improved Bus-Conflict Detection
ATS '98 Proceedings of the 7th Asian Test Symposium
MOSAIC: A Multiple-Strategy Oriented Sequential ATPG for Integrated Circuits
EDTC '97 Proceedings of the 1997 European conference on Design and Test
HITEC: a test generation package for sequential circuits
EURO-DAC '91 Proceedings of the conference on European design automation
Improving Fault Coverage in System Tests
IOLTW '00 Proceedings of the 6th IEEE International On-Line Testing Workshop (IOLTW)
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This paper presents the research results of thesequential testability of the Philips 80C51 micro-controller [14]. The motivations for this research wereto save chip area and test application time (i.e., re-ducing the production costs), and to evaluate the effectiveness and efficiency of the Delft Automatic Test(DAT) generation system for sequential circuits [10] onreal industrial sequential circuits, such as the 80C51.ATPG has been performed on a fully sequential version (non-scan), and on several partial-scan versions ofthe 80C51. The stuck-at fault coverage of the full-scanversion is above 91%, while the fault coverage of thenon-scan version is almost zero. Therefore, partial-scanversions of the 80C51 have been developed to achievethe fault coverage level of the full-scan version. Experimental results demonstrate that almost 50% of theFFs have to be scannable in order to approach the faultcoverage of the full-scan version. The fault coverage isreduced by \pm10%, when \pm30% of the FFs have beenselected for scan.