Using MUXs Network to Hide Bunches of Scan Chains
ISQED '05 Proceedings of the 6th International Symposium on Quality of Electronic Design
Test compression for scan circuits using scan polarity adjustment and pinpoint test relaxation
Proceedings of the 2005 Asia and South Pacific Design Automation Conference
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This paper presents a pinpoint test set relaxation method for testcompression that maximally derives the capability of a run-lengthencoding technique such as Golomb coding or frequency-directedrun-length (FDR) coding. Before encoding a given set of testpatterns, we selectively relax some specified bits of the testpatterns. By changing a specified bit with value 1 to a don't-care,two consecutive runs of 0s in the test sequence can be concatenatedinto a longer run of 0, thereby facilitating run-length coding.This procedure retains the fault coverage of the testset. Since theincrease in compression depends on the lengths of the two runs thatare concatenated with each bit relaxation, a lookup table, referredto as the gain table, is pre-computed and used during the test setrelaxation procedure to maximize the likelihood of increasing theamount of test data compression. The gain table is used to pinpointthe bit positions with value 1, which when relaxed to don't-cares,will yield the most compression. In this way, the given testpattern set is appropriately modified as a preprocessing stepbefore test compression. Experimental results for the ISCASbenchmark circuits show that the proposed method can be used toincrease the effectiveness of run-length coding methods for testdata compression.