A self-checking PLA automatic generator tool based on unordered codes encoding

Authors:
K. Torki;M. Nicolaidis;A. O. Fernandes
Affiliations:
IMAG/TIM3 46, Avenue Félix VIALLET, 38031 GRENOBLE CEDEX, FRANCE;IMAG/TIM3 46, Avenue Félix VIALLET, 38031 GRENOBLE CEDEX, FRANCE;IMAG/TIM3 46, Avenue Félix VIALLET, 38031 GRENOBLE CEDEX, FRANCE
Venue:
EURO-DAC '91 Proceedings of the conference on European design automation
Year:
1991

Citing 4
Cited 0

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A testing strategy for PLAs

DAC '78 Proceedings of the 15th Design Automation Conference

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Abstract

Self-checking circuits ensure concurrent error detection by means of hardware redundancy. An important drawback of self-checking circuits is the fact that they involve a significant increasing of the design time. Specific CAD tools are needed in order to cope with this drawback. In this paper we present a tool allowing automatic generation of self-checking PLAs. Then we validate this tool by transforming a set of PLA benchmarks into self-checking PLAs and we give statistics concerning the required area overhead.