VLSI architecture of modified Euclidean algorithm for Reed-Solomon code

Authors:
Y. W. Chang;T. K. Truong;J. H. Jeng
Affiliations:
Department of Information Engineering, College of Electrical and Information Engineering, I-Shou University, Kaohsiung county, Kaohsiung 840, Taiwan, ROC;Department of Information Engineering, College of Electrical and Information Engineering, I-Shou University, Kaohsiung county, Kaohsiung 840, Taiwan, ROC;Department of Information Engineering, College of Electrical and Information Engineering, I-Shou University, Kaohsiung county, Kaohsiung 840, Taiwan, ROC
Venue:
Information Sciences: an International Journal
Year:
2003

Citing 4
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Abstract

A modified Euclidean decoding algorithm to solve the Berlekamp's key equation of Reed-Solomon code for correcting errors, is presented in this paper. It is derived to solve the error locator and evaluator polynomials simultaneously without performing the operations of polynomial division and field element inversion. In this algorithm, the number of iterations used to solve the equation is fixed, and also the weights used to reduce the degree of the error evaluator polynomial at each iteration can be extracted from the coefficient of fixed degree. Therefore, this proposed algorithm saves many controlling circuits, and provides module architecture with regularity. As a result it is simple and easy to implement, and in addition it can be easily configured for various applications.