NANOPRISM: a tool for evaluating granularity vs. reliability trade-offs in nano architectures
Proceedings of the 14th ACM Great Lakes symposium on VLSI
Nano, quantum, and molecular computing: are we ready for the validation and test challenges?
HLDVT '03 Proceedings of the Eighth IEEE International Workshop on High-Level Design Validation and Test Workshop
Nanocomputing in the presence of defects and faults: a survey
Nano, quantum and molecular computing
Tools and techniques for evaluating reliability trade-offs for NANO-architectures
Nano, quantum and molecular computing
Probabilistic maximum error modeling for unreliable logic circuits
Proceedings of the 17th ACM Great Lakes symposium on VLSI
On the use of Bloom filters for defect maps in nanocomputing
Proceedings of the 2006 IEEE/ACM international conference on Computer-aided design
Hybrid nanoelectronics: future of computer technology
Journal of Computer Science and Technology
Quantitative Analysis With the Probabilistic Model Checker PRISM
Electronic Notes in Theoretical Computer Science (ENTCS)
Probabilistic error modeling for nano-domain logic circuits
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
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As we move from deep submicron technology to nanotechnologyfor device manufacture, the need for defect-tolerantarchitectures is gaining importance. This is because, at thenanoscale, devices will be prone to errors due to manufacturingdefects, ageing, and transient faults. Micro-architectswill be required to design their logic around defect tolerancethrough redundancy. However, measures of reliabilitymust be quantified in order for such design methodologiesto be acceptable. We propose a CAD framework basedon probabilistic model checking which provides efficientevaluation of the reliability/redundancy trade-off for defect-tolerantarchitectures. This framework can model probabilisticassumptions about defects, easily compute reliabilityfigures and help designers make the right decisions.We demonstrate the power of our framework by evaluatingthe reliability/redundancy trade-off of a canonical example,namely NAND multiplexing. We not only find errors in analyticallycomputed bounds published recently, but we alsoshow how to use our framework to evaluate various facetsof design trade-off for reliability.