Logic in Wire: Using Quantum Dots to Implement a Microprocessor
GLS '99 Proceedings of the Ninth Great Lakes Symposium on VLSI
Defects and Faults in Quantum Cellular Automata at Nano Scale
VTS '04 Proceedings of the 22nd IEEE VLSI Test Symposium
QCA channel routing with wire crossing minimization
GLSVLSI '05 Proceedings of the 15th ACM Great Lakes symposium on VLSI
Partitioning and placement for buildable QCA circuits
ACM Journal on Emerging Technologies in Computing Systems (JETC)
Journal of Systems Architecture: the EUROMICRO Journal
A layout-aware physical design method for constructing feasible QCA circuits
Proceedings of the 18th ACM Great Lakes symposium on VLSI
Applying inherent capabilities of quantum-dot cellular automata to design: D flip-flop case study
Journal of Systems Architecture: the EUROMICRO Journal
Defects and faults in QCA-based PLAs
ACM Journal on Emerging Technologies in Computing Systems (JETC)
A new quantum-dot cellular automata full-adder
Microelectronics Journal
Design of logical structures and characteristics analysis of AOI for quantum dot cellular automata
WSEAS Transactions on Circuits and Systems
Hi-index | 0.00 |
Quantum-dot Cellular Automata (QCA) offers a new computing paradigm in nanotechnology. The basic logic elements of this technology are the inverter and the majority voter. In this paper, we propose a novel complex and universal QCA gate: the And-Or-Inverter (AOI) gate, which is a 5 input gate consisting of 7 cells. This paper presents a detailed simulation-based analysis of the AOI gate as well as the characterization of QCA defects and study of their effects at logic level. Design implementations using the AOI gate are compared with the conventional CMOS and the majority voter-based QCA methodology. Testing of the AOI gate at logic level is also addressed, unique testing features of designs based on this complex gate have been investigated.