Circuit-aware architectural simulation

Authors:
Seokwoo Lee;Shidhartha Das;Valeria Bertacco;Todd Austin;David Blaauw;Trevor Mudge
Affiliations:
The University of Michigan, Ann Arbor, MI;The University of Michigan, Ann Arbor, MI;The University of Michigan, Ann Arbor, MI;The University of Michigan, Ann Arbor, MI;The University of Michigan, Ann Arbor, MI;The University of Michigan, Ann Arbor, MI
Venue:
Proceedings of the 41st annual Design Automation Conference
Year:
2004

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Abstract

Architectural simulation has achieved a prominent role in the system design cycle by providing designers the ability to quickly examine a wide variety of design choices. However, the recent trend in system design toward architectures that react to circuit-level phenomena has outstripped the capabilities of traditional cycle-based architectural simulators. In this paper, we present an architectural simulator design that incorporates a circuit modeling capability, permitting architectural-level simulations that react to circuit characteristics (such as latency,energy,or current draw) on a cycle-by-cycle basis. While these additional capabilities slow simulation speed, we show that the careful application of circuit simulation optimizations and simulation sampling techniques permit high levels of detail with sufficient speed to examine entire workloads.