Data compression for improving SPM behavior

Authors:
O. Ozturk;M. Kandemir;I. Demirkiran;G. Chen;M. J. Irwin
Affiliations:
Pennsylvania State University, University Park, PA;Pennsylvania State University, University Park, PA;Syracuse University, Syracuse, NY;Pennsylvania State University, University Park, PA;Pennsylvania State University, University Park, PA
Venue:
Proceedings of the 41st annual Design Automation Conference
Year:
2004

Citing 14
Cited 4

Compiler-controlled memory

Proceedings of the eighth international conference on Architectural support for programming languages and operating systems
Instruction fetch energy reduction using loop caches for embedded applications with small tight loops

ISLPED '99 Proceedings of the 1999 international symposium on Low power electronics and design
A fully associative software-managed cache design

Proceedings of the 27th annual international symposium on Computer architecture
Dynamic management of scratch-pad memory space

Proceedings of the 38th annual Design Automation Conference
Exploiting shared scratch pad memory space in embedded multiprocessor systems

Proceedings of the 39th annual Design Automation Conference
Compiler-directed scratch pad memory hierarchy design and management

Proceedings of the 39th annual Design Automation Conference
High Performance Compilers for Parallel Computing

High Performance Compilers for Parallel Computing
Reducing energy consumption by dynamic copying of instructions onto onchip memory

Proceedings of the 15th international symposium on System Synthesis
Increasing Energy Efficiency of Embedded Systems by Application-Specific Memory Hierarchy Generation

IEEE Design & Test
An Overview of a Compiler for Scalable Parallel Machines

Proceedings of the 6th International Workshop on Languages and Compilers for Parallel Computing
Efficient Utilization of Scratch-Pad Memory in Embedded Processor Applications

EDTC '97 Proceedings of the 1997 European conference on Design and Test
Energy and Performance Improvements in Microprocessor Design Using a Loop Cache

ICCD '99 Proceedings of the 1999 IEEE International Conference on Computer Design
Hardware-Assisted Data Compression for Energy Minimization in Systems with Embedded Processors

Proceedings of the conference on Design, automation and test in Europe
Compiler-decided dynamic memory allocation for scratch-pad based embedded systems

Proceedings of the 2003 international conference on Compilers, architecture and synthesis for embedded systems

Increasing on-chip memory space utilization for embedded chip multiprocessors through data compression

CODES+ISSS '05 Proceedings of the 3rd IEEE/ACM/IFIP international conference on Hardware/software codesign and system synthesis
DRDU: A data reuse analysis technique for efficient scratch-pad memory management

ACM Transactions on Design Automation of Electronic Systems (TODAES)
Overlay techniques for scratchpad memories in low power embedded processors

IEEE Transactions on Very Large Scale Integration (VLSI) Systems
Static minimization of total energy consumption in memory subsystem for scratchpad-based systems-on-chips

IEEE Transactions on Very Large Scale Integration (VLSI) Systems

Quantified Score

Hi-index	0.00

Visualization

Abstract

Scratch-pad memories (SPMs) enable fast access to time-critical data. While prior research studied both static and dynamic SPM management strategies, not being able to keep all hot data (i.e., data with high reuse) in the SPM remains the biggest problem. This paper proposes data compression to increase the number of data blocks that can be kept in the SPM. Our experiments with several embedded applications show that our compression-based SPM management heuristic is very effective and outperforms prior static and dynamic SPM management approaches. We also present an ILP formulation of the problem, and show that the proposed heuristic generates competitive results with those obtained through ILP, while spending much less time in compilation.