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In this paper, we suggest hardware-assisted data compressionas a tool for reducing energy consumption of core-based embed-ded systems. We propose a novel and efficient architecture foron-the-fly data compression and decompression whose field ofoperation is the cache-to-memory path. Uncompressed cachelines are compressed before they are written back to main mem-ory, and decompressed when cache refills take place.We explore two classes of compression methods, profile-drivenand differential, since they are characterized by compact HWimplementations, and we compare their performance to thoseprovided by some state-of-the-art compression methods (e.g.,we have considered a few variants of the Lempel-Ziv encoder).We present experimental results about memory traffic and en-ergy consumption in the cache-to-memory path of a core-basedsystem running standard benchmark programs. The achievedaverage energy savings range from 4.2% to 35.2%, dependingon the selected compression algorithm.