Embedding universal delay-insensitive circuits in asynchronous cellular spaces

  • Authors:

  • Jia Lee;Susumu Adachi;Ferdinand Peper;Kenichi Morita

  • Affiliations:

  • Communications Research Laboratory, Nanotechnology Group, 588-2 Iwaoka, Iwaoka-cho, Nishi-ku, Kobe 651-2492, Japan;Communications Research Laboratory, Nanotechnology Group, 588-2 Iwaoka, Iwaoka-cho, Nishi-ku, Kobe 651-2492, Japan;Communications Research Laboratory, Nanotechnology Group, 588-2 Iwaoka, Iwaoka-cho, Nishi-ku, Kobe 651-2492, Japan;Hiroshima University, Department of Information Engineering, Higashi-Hiroshima 739-8527, Japan

  • Venue:
  • Fundamenta Informaticae - Special issue on cellular automata
  • Year:
  • 2003

Quantified Score

Hi-index 0.00

Visualization

Abstract

Asynchronous Cellular Automata (ACA) are cellular automata which allow cells to be updated at times that are random and independent of each other. Due to their unpredictable behavior, ACA are usually dealt with by simulating a timing mechanism that forces all cells into synchronicity. Though this allows the use of well-established synchronous methods to conduct computations, it comes at the price of an increased number of cell states. This paper presents a more effective approach based on a 5-state ACA with von Neumann neighborhood that uses rotation- and reflection-symmetric transition rules to describe the interactions between cells. We achieve efficient computation on this model by embedding so-called Delay-Insensitive circuits in it, a type of asynchronous circuits in which signals may be subject to arbitrary delays, without this being an obstacle to correct operation. Our constructions not only imply the computational universality of the proposed cellular automaton, but also allow the efficient use of its massive parallelism, in the sense that the circuits operate in parallel and there are no signals running around indefinitely in the circuits in the absence of input.