The Recursive NanoBox Processor Grid: A Reliable System Architecture for Unreliable Nanotechnology Devices

  • Authors:
  • A. J. KleinOsowski;Kevin KleinOsowski;Vijay Rangarajan;Priyadarshini Ranganath;David J. Lilja

  • Affiliations:
  • University of Minnesota, Minneapolis;University of Minnesota, Minneapolis;University of Minnesota, Minneapolis;University of Minnesota, Minneapolis;University of Minnesota, Minneapolis

  • Venue:
  • DSN '04 Proceedings of the 2004 International Conference on Dependable Systems and Networks
  • Year:
  • 2004

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Abstract

Advanced molecular nanotechnology devices are expectedto have exceedingly high transient fault rates and largenumbers of inherent device defects compared to conventionalCMOS devices. We introduce the Recursive NanoBoxProcessor Grid as an application specific, fault-tolerant,parallel computing system designed for fabrication with unreliablenanotechnology devices. In this initial study weconstruct VHDL models of the NanoBox Processor cellALU and evaluate the effectiveness of our recursive faultmasking approach in the presence of random transient errors.Our analysis shows that the ALU can calculate correctly100 percent of the time with raw FIT (failures in time)rates as high as 10{23}. We achieve this error correction withan area overhead on the order of 9x, which is quite reasonablegiven the high integration densities expected with nanodevices.