Nanocomputing in the presence of defects and faults: a survey
Nano, quantum and molecular computing
StageNetSlice: a reconfigurable microarchitecture building block for resilient CMP systems
CASES '08 Proceedings of the 2008 international conference on Compilers, architectures and synthesis for embedded systems
The StageNet fabric for constructing resilient multicore systems
Proceedings of the 41st annual IEEE/ACM International Symposium on Microarchitecture
Analysis of defect tolerance in molecular crossbar electronics
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
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Advanced molecular nanotechnology devices are expectedto have exceedingly high transient fault rates and largenumbers of inherent device defects compared to conventionalCMOS devices. We introduce the Recursive NanoBoxProcessor Grid as an application specific, fault-tolerant,parallel computing system designed for fabrication with unreliablenanotechnology devices. In this initial study weconstruct VHDL models of the NanoBox Processor cellALU and evaluate the effectiveness of our recursive faultmasking approach in the presence of random transient errors.Our analysis shows that the ALU can calculate correctly100 percent of the time with raw FIT (failures in time)rates as high as 10{23}. We achieve this error correction withan area overhead on the order of 9x, which is quite reasonablegiven the high integration densities expected with nanodevices.