Invariance of complexity measures for networks with unreliable gates
Journal of the ACM (JACM)
NanoFabrics: spatial computing using molecular electronics
ISCA '01 Proceedings of the 28th annual international symposium on Computer architecture
Energy-efficiency bounds for deep submicron VLSI systems in the presence of noise
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
Nanowire-based sublithographic programmable logic arrays
FPGA '04 Proceedings of the 2004 ACM/SIGDA 12th international symposium on Field programmable gate arrays
Opportunities and challenges in application-tuned circuits and architectures based on nanodevices
Proceedings of the 1st conference on Computing frontiers
DSN '04 Proceedings of the 2004 International Conference on Dependable Systems and Networks
A mapping algorithm for defect-tolerance of reconfigurable nano-architectures
ICCAD '05 Proceedings of the 2005 IEEE/ACM International conference on Computer-aided design
DFT '06 Proceedings of the 21st IEEE International Symposium on on Defect and Fault-Tolerance in VLSI Systems
An Overview of Nanoscale Devices and Circuits
IEEE Design & Test
Analysis of Mask-Based Nanowire Decoders
IEEE Transactions on Computers
SFCS '85 Proceedings of the 26th Annual Symposium on Foundations of Computer Science
Analysis of defect tolerance in molecular electronics using information-theoretic measures
NANOARCH '07 Proceedings of the 2007 IEEE International Symposium on Nanoscale Architectures
A defect-tolerant memory architecture for molecular electronics
IEEE Transactions on Nanotechnology
NANOLAB-a tool for evaluating reliability of defect-tolerant nanoarchitectures
IEEE Transactions on Nanotechnology
Bifurcations and fundamental error bounds for fault-tolerant computations
IEEE Transactions on Nanotechnology
Hierarchical fault tolerance for nanoscale memories
IEEE Transactions on Nanotechnology
Defect and Transient Fault-Tolerant System Design for Hybrid CMOS/Nanodevice Digital Memories
IEEE Transactions on Nanotechnology
On the maximum tolerable noise for reliable computation by formulas
IEEE Transactions on Information Theory
Signal propagation and noisy circuits
IEEE Transactions on Information Theory
Information capacity of nanowire crossbar switching networks
IEEE Transactions on Information Theory
An information-theoretic analysis of quantum-dot cellular automata for defect tolerance
ACM Journal on Emerging Technologies in Computing Systems (JETC)
Defect-tolerant logic hardening for crossbar-based nanosystems
Proceedings of the Conference on Design, Automation and Test in Europe
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Molecular electronics such as silicon nanowires (NW) and carbon nanotubes (CNT) demonstrate great potential for continuing the technology advances toward future nanocomputing paradigm. However, excessive defects from bottom-up stochastic assembly have emerged as a fundamental obstacle for achieving reliable computation using molecular electronics. In this paper, we present an information-theoretic approach to investigate the intrinsic relationship between defect tolerance and inherence redundancy in molecular crossbar systems. By modeling defect-prone molecular crossbars as a non-ideal information processing medium, we determine the information transfer capacity, which can be interpreted as the bound on reliability that a molecular crossbar system can achieve. The proposed method allows us to evaluate the effectiveness of redundancy-based defect tolerance in a quantitative manner. Employing this method, we derive the gap of reliability between redundancy-based defect tolerance and ideal defect-free molecular systems. We also show the implications to the related design optimization problem.