Interactive AC modeling and characterization of analog circuits via symbolic analysis
Analog Integrated Circuits and Signal Processing
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Analog Integrated Circuits and Signal Processing
Formula approximation for flat and hierarchical symbolic analysis
Analog Integrated Circuits and Signal Processing - Special issue on symbolic analysis of analog circuits: techniques and applications
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Analog Integrated Circuits and Signal Processing - Special issue on analog signal processing
DARWIN: CMOS opamp synthesis by means of a genetic algorithm
DAC '95 Proceedings of the 32nd annual ACM/IEEE Design Automation Conference
Lazy-expansion symbolic expression approximation in SYNAP
ICCAD '92 Proceedings of the 1992 IEEE/ACM international conference on Computer-aided design
Proceedings of the 37th Annual Design Automation Conference
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System-on-a-chip verification: methodology and techniques
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Analog Integrated Circuits and Signal Processing
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Analog Integrated Circuits and Signal Processing
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IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
Anaconda: simulation-based synthesis of analog circuits via stochastic pattern search
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
Optimal design of a CMOS op-amp via geometric programming
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
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In this paper, a methodology to automate the synthesis of an industrial-purpose analog integrated circuit, namely the back-end of an I & Q transmit interface, is presented. A good matching between both I and Q channels is desirable to ensure the correct circuit functioning.The proposed methodology combines the use of symbolic expressions with numerical approaches. While the symbolic expressions allow a fast iterative evaluation of the circuit performance, the numerical capabilities ensure a rapid optimization of the results. Unlike other approaches, the methodology uses symbolic expressions explicitly considering device mismatch, which are evaluated performing a Monte-Carlo analysis. The expressions have been obtained using an error-control process guided by the mean and standard deviation values of the circuit performance characteristics. This provides two benefits. First, smaller expressions are obtained. Second, expression evaluation is faster: smaller number of operations—symbol products and term sums—are carried out since, at each Monte-Carlo run, only those symbols related to device mismatch are to be changed, while the rest remains constant.A comparison between the presented synthesis technique and other purely numerical and numerical/symbolic approaches is also given.