Delayed line bus scheme: a low-power bus scheme for coupled on-chip buses

Authors:
Maged Ghoneima;Yehea Ismail
Affiliations:
Northwestern University, Evanston, IL;Northwestern University, Evanston, IL
Venue:
Proceedings of the 2004 international symposium on Low power electronics and design
Year:
2004

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Abstract

This paper presents a comprehensive qualitative and analytical analysis of the effect of relative delay on the dissipated energy of coupled lines. Closed form expressions modeling the effect of relative delay on the dissipated energy, and the Miller coupling factor, MCF, are also presented. Skewing the worst switching case is shown to provide up to 50% reduction in energy dissipation. This observation was implemented in a low-power bus scheme, DLBS, which leads to a power reduction of up to 25%.