CoWare—a design environment for heterogenous hardware/software systems
EURO-DAC '96/EURO-VHDL '96 Proceedings of the conference on European design automation
Reuse methodology manual: for system-on-a-chip designs
Reuse methodology manual: for system-on-a-chip designs
Surviving the SOC revolution: a guide to platform-based design
Surviving the SOC revolution: a guide to platform-based design
Mixed-level cosimulation for fine gradual refinement of communication in SoC design
Proceedings of the conference on Design, automation and test in Europe
Co-Synthesis of Hardware and Software for Digital Embedded Systems
Co-Synthesis of Hardware and Software for Digital Embedded Systems
Hardware/Software CO-Design: Principles and Practice
Hardware/Software CO-Design: Principles and Practice
Automated Design Space Exploration for DSP Applications
Journal of Signal Processing Systems
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The design of high performance multimedia systems in a short time force us to use IP's blocks in many designs. However, their correct integration in a design implies more complex verification problems. In this paper, we present a C++/SystemC based simulation flow at multiple levels of abstraction. Our approach is to use SystemC to describe both application and a set of algorithmic IP cores to be incorporated throughout the design flow. Our methodology supports design refinement through four main abstraction levels, offers verification techniques at each level and allows the use of EDA co-verification tools. The use of C++/SystemC to model all parts of the system provides great flexibility and enables faster simulation compared to existing methodologies. An illustrative case study for wavelet based compression system design shows that our methodology supports efficient algorithmic specification, where IP models can be easily incorporated, modified and simulated in order to quickly evaluate alternative system implementation .