A predictive NoC architecture for vision systems dedicated to image analysis
EURASIP Journal on Embedded Systems
An overview of reconfigurable hardware in embedded systems
EURASIP Journal on Embedded Systems
Application development on hybrid systems
Proceedings of the 2007 ACM/IEEE conference on Supercomputing
Visions for application development on hybrid computing systems
Parallel Computing
Design and evaluation of a hardware/software FPGA-based system for fast image processing
Microprocessors & Microsystems
Computer Vision and Image Understanding
Poly-DWT: Polymorphic wavelet hardware support for dynamic image compression
ACM Transactions on Embedded Computing Systems (TECS)
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We demonstrate the use of a "smart camera" to accelerate two very different image processing applications. The smart camera consists of a high quality video camera and frame grabber connected directly to an FPGA processing board. The advantages of this setup include minimizing the movement of large datasets and minimizing the latency by starting to process data before a complete frame has been acquired. The two applications, one from the area of medical image processing and the other from computational fluid dynamics both exhibit speedups of more than 20 times over software implementations on a 1.5GHz PC. This smart camera setup is enabling image processing implementations that have not, before now, been achievable in real time.