Model-checking in dense real-time
Information and Computation - Special issue: selections from 1990 IEEE symposium on logic in computer science
Real-Time Schedulability Tests for Preemptive Multitasking
WPDRTS Selected papers from the 4th workshop on Parallel and distributed real-time systems
Performance Estimation for Real-Time Distributed Embedded Systems
IEEE Transactions on Parallel and Distributed Systems
Scheduling Algorithms for Multiprogramming in a Hard-Real-Time Environment
Journal of the ACM (JACM)
Model composition for scheduling analysis in platform design
Proceedings of the 39th annual Design Automation Conference
Hard Real-Time Computing Systems: Predictable Scheduling Algorithms and Applications
Hard Real-Time Computing Systems: Predictable Scheduling Algorithms and Applications
Performance Analysis of Real-Time Embeded Software
Performance Analysis of Real-Time Embeded Software
Behavioral Intervals in Embedded Software: Timing and Power Analysis of Embedded Real-Time Software Processes
Scheduler Modeling Based on the Controller Synthesis Paradigm
Real-Time Systems
Embedded Software in Network Processors - Models and Algorithms
EMSOFT '01 Proceedings of the First International Workshop on Embedded Software
Transformation of SDL specifications for system-level timing analysis
Proceedings of the tenth international symposium on Hardware/software codesign
Event Model Interfaces for Heterogeneous System Analysis
Proceedings of the conference on Design, automation and test in Europe
Safe Automotive Software Development
DATE '03 Proceedings of the conference on Design, Automation and Test in Europe - Volume 1
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Complex multi-processor systems-on-chip and distributed embedded systems exhibit a confusing variety of run time interdependencies. For reliable timing validation, not only application, but also architecture, scheduling and communication properties have to be considered. This is very different from functional validation, where architecture, scheduling and communication can be idealized. To avoid unknown corner-case coverage in simulation-based validation on one had, and the state-space explosion or over-simplification of unified formal performance models on the other, we take a compositional approach and combine different efficient models and methods for timing analysis of single processes, real-time operating system (RTOS) overhead, single processors and communication components, and finally multiple connected components. As a result, timing analysis of complex, heterogeneous embedded systems becomes feasible.