Parallel program design: a foundation
Parallel program design: a foundation
ECAI '92 Proceedings of the 10th European conference on Artificial intelligence
Symbolic model checking: 1020 states and beyond
Information and Computation - Special issue: Selections from 1990 IEEE symposium on logic in computer science
Model-checking in dense real-time
Information and Computation - Special issue: selections from 1990 IEEE symposium on logic in computer science
Model checking and abstraction
ACM Transactions on Programming Languages and Systems (TOPLAS)
The algorithmic analysis of hybrid systems
Theoretical Computer Science - Special issue on hybrid systems
Property preserving abstractions for the verification of concurrent systems
Formal Methods in System Design - Special issue on computer-aided verification (based on CAV'92 workshop)
Temporal verification of reactive systems: safety
Temporal verification of reactive systems: safety
Designing executable abstractions
FMSP '98 Proceedings of the second workshop on Formal methods in software practice
Bounded Model Checking Using Satisfiability Solving
Formal Methods in System Design
Symbolic Model Checking
Proceedings of the 11th International Conference on Computer Aided Verification
CAV '99 Proceedings of the 11th International Conference on Computer Aided Verification
Symbolic Simulation: An ACL2 Approach
FMCAD '98 Proceedings of the Second International Conference on Formal Methods in Computer-Aided Design
Construction of Abstract State Graphs with PVS
CAV '97 Proceedings of the 9th International Conference on Computer Aided Verification
Transforming the Theorem Prover into a Digital Design Tool: From Concept Car to Off-Road Vehicle
CAV '98 Proceedings of the 10th International Conference on Computer Aided Verification
Lazy Theorem Proving for Bounded Model Checking over Infinite Domains
CADE-18 Proceedings of the 18th International Conference on Automated Deduction
LICS '96 Proceedings of the 11th Annual IEEE Symposium on Logic in Computer Science
Symbolic Protocol Verification with Queue BDDs
LICS '96 Proceedings of the 11th Annual IEEE Symposium on Logic in Computer Science
Formal analysis of the priority ceiling protocol
RTSS'10 Proceedings of the 21st IEEE conference on Real-time systems symposium
Verification and validation of simulation models
WSC '05 Proceedings of the 37th conference on Winter simulation
Verification and validation of simulation models
Proceedings of the 39th conference on Winter simulation: 40 years! The best is yet to come
Verification and validation of simulation models
Proceedings of the 40th Conference on Winter Simulation
Verification and validation of simulation models
Winter Simulation Conference
Verification and validation of simulation models
Proceedings of the Winter Simulation Conference
Verification and validation of simulation models
Proceedings of the Winter Simulation Conference
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Symbolic evaluation is the execution of software and software designs on inputs given as symbolic or explicit constants along with constraints on these inputs. Efficient symbolic evaluation is now feasible due to recent advances in efficient decision procedures and symbolic model checking. Symbolic evaluation can be applied to partially implemented descriptions and provides wider coverage and greater assurance than testing and traditional simulation alone. Unlike full formal verification, symbolic evaluation can be used in a partial manner that is more likely to succeed and yield some degree of assurance. Its main advantage is that it can be used within a smooth spectrum of analyses ranging from refutation based on explicit-state simulation to full-blown verification.