A computational logic handbook
A computational logic handbook
An approach to systems verification
Journal of Automated Reasoning
An Industrial Strength Theorem Prover for a Logic Based on Common Lisp
IEEE Transactions on Software Engineering
Mechanized formal reasoning about programs and computing machines
Automated reasoning and its applications
ACL2 Theorems About Commercial Microprocessors
FMCAD '96 Proceedings of the First International Conference on Formal Methods in Computer-Aided Design
Symbolic Simulation of the JEM1 Microprocessor
FMCAD '98 Proceedings of the Second International Conference on Formal Methods in Computer-Aided Design
Transforming the Theorem Prover into a Digital Design Tool: From Concept Car to Off-Road Vehicle
CAV '98 Proceedings of the 10th International Conference on Computer Aided Verification
ACL2 Support for Verification Projects (Invited Talk)
CADE-15 Proceedings of the 15th International Conference on Automated Deduction: Automated Deduction
Automated Correctness Condition Generation for Formal Verification ofSynthesized RTL Designs
Formal Methods in System Design - Special issue on formal methods for computer-added design
Formal Verification of Descriptions with Distinct Order of Memory Operations
ASIAN '99 Proceedings of the 5th Asian Computing Science Conference on Advances in Computing Science
Symbolic Simulation of Microprocessor Models using Type Classes in Haskell
CHARME '99 Proceedings of the 10th IFIP WG 10.5 Advanced Research Working Conference on Correct Hardware Design and Verification Methods
Formal Verification of Designs with Complex Control by Symbolic Simulation
CHARME '99 Proceedings of the 10th IFIP WG 10.5 Advanced Research Working Conference on Correct Hardware Design and Verification Methods
TheoSim: combining symbolic simulation and theorem proving for hardware verification
SBCCI '04 Proceedings of the 17th symposium on Integrated circuits and system design
Simulation and verification I: from simulation to verification (and back)
Proceedings of the 35th conference on Winter simulation: driving innovation
Verification of behavioral descriptions by combining symbolic simulation and automatic reasoning
GLSVLSI '05 Proceedings of the 15th ACM Great Lakes symposium on VLSI
A reflective functional language for hardware design and theorem proving
Journal of Functional Programming
A Generic Model for Formally Verifying NoC Communication Architectures: A Case Study
NOCS '07 Proceedings of the First International Symposium on Networks-on-Chip
SOFSEM '09 Proceedings of the 35th Conference on Current Trends in Theory and Practice of Computer Science
Machine-code verification for multiple architectures: an application of decompilation into logic
Proceedings of the 2008 International Conference on Formal Methods in Computer-Aided Design
Verified just-in-time compiler on x86
Proceedings of the 37th annual ACM SIGPLAN-SIGACT symposium on Principles of programming languages
A sound semantics for OCamllight
ESOP'08/ETAPS'08 Proceedings of the Theory and practice of software, 17th European conference on Programming languages and systems
A framework for testing hardware-software security architectures
Proceedings of the 26th Annual Computer Security Applications Conference
Combining several paradigms for circuit validation and verification
CASSIS'04 Proceedings of the 2004 international conference on Construction and Analysis of Safe, Secure, and Interoperable Smart Devices
Science of Computer Programming
Large-scale formal verification in practice: a process perspective
Proceedings of the 34th International Conference on Software Engineering
An executable semantics for compcert c
CPP'12 Proceedings of the Second international conference on Certified Programs and Proofs
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Executable formal specification can allow engineers to test (or simulate) the specified system on concrete data before the system is implemented. This is beginning to gain acceptance and is just the formal analogue of the standard practice of building simulators in conventional programming languages such as C. A largely unexplored but potentially very useful next step is symbolic simulation, the "execution" of the formal specification on indeterminant data. With the right interface, this need not require much additional training of the engineers using the tool. It allows many tests to be collapsed into one. Furthermore, it familiarizes the working engineer with the abstractions and notation used in the design, thus allowing team members to speak clearly to one another. We illustrate these ideas with a formal specification of a simple computing machine in ACL2. We sketch some requirements on the interface, which we call a symbolic spreadsheet.