Java Virtual Machine Specification
Java Virtual Machine Specification
The Java Language Specification
The Java Language Specification
FMCAD '96 Proceedings of the First International Conference on Formal Methods in Computer-Aided Design
WIFT '95 Proceedings of the 1st Workshop on Industrial-Strength Formal Specification Techniques
Efficient Simulation of Formal Processor Models
Formal Methods in System Design
Automated Correctness Condition Generation for Formal Verification ofSynthesized RTL Designs
Formal Methods in System Design - Special issue on formal methods for computer-added design
ACM Transactions on Programming Languages and Systems (TOPLAS)
Towards a mechanically checked theory of computation: the ACL2 project
Logic-based artificial intelligence
Single-Threaded Objects in ACL2
PADL '02 Proceedings of the 4th International Symposium on Practical Aspects of Declarative Languages
Formal Verification of Descriptions with Distinct Order of Memory Operations
ASIAN '99 Proceedings of the 5th Asian Computing Science Conference on Advances in Computing Science
Symbolic Simulation: An ACL2 Approach
FMCAD '98 Proceedings of the Second International Conference on Formal Methods in Computer-Aided Design
Symbolic Functional Evaluation
TPHOLs '99 Proceedings of the 12th International Conference on Theorem Proving in Higher Order Logics
Symbolic Simulation of Microprocessor Models using Type Classes in Haskell
CHARME '99 Proceedings of the 10th IFIP WG 10.5 Advanced Research Working Conference on Correct Hardware Design and Verification Methods
Formal Verification of Designs with Complex Control by Symbolic Simulation
CHARME '99 Proceedings of the 10th IFIP WG 10.5 Advanced Research Working Conference on Correct Hardware Design and Verification Methods
FM-Trends 98 Proceedings of the International Workshop on Current Trends in Applied Formal Method: Applied Formal Methods
Symbolic NFA scheduling of a RISC microprocessor
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
Executable JVM model for analytical reasoning: a study
Proceedings of the 2003 workshop on Interpreters, virtual machines and emulators
Journal of Automated Reasoning
TheoSim: combining symbolic simulation and theorem proving for hardware verification
SBCCI '04 Proceedings of the 17th symposium on Integrated circuits and system design
Verification of behavioral descriptions by combining symbolic simulation and automatic reasoning
GLSVLSI '05 Proceedings of the 15th ACM Great Lakes symposium on VLSI
Executable JVM model for analytical reasoning: a study
Science of Computer Programming - Special issue on advances in interpreters, virtual machines and emulators (IVME'03)
Verified Software: Theories, Tools, Experiments
Combining several paradigms for circuit validation and verification
CASSIS'04 Proceedings of the 2004 international conference on Construction and Analysis of Safe, Secure, and Interoperable Smart Devices
Refinement and theorem proving
SFM'06 Proceedings of the 6th international conference on Formal Methods for the Design of Computer, Communication, and Software Systems
About 15 years of real-time Java
Proceedings of the 10th International Workshop on Java Technologies for Real-time and Embedded Systems
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Symbolic simulation is the simulation of the execution of a computer system on an incompletely defined, or symbolic, state. This process results in a set of expressions that define the final machine state symbolically in terms of the initial machine state. We describe our use of symbolic simulation in conjunction with the development of the JEM1, the world's first Java processor. We demonstrate that symbolic simulation can be used to detect microcode design errors and that it can be integrated into our current design process.