Using Lin-Kernighan algorithm for look-up table compression to improve code density
GLSVLSI '06 Proceedings of the 16th ACM Great Lakes symposium on VLSI
Efficient code density through look-up table compression
Proceedings of the conference on Design, automation and test in Europe
Instruction splitting for efficient code compression
Proceedings of the 44th annual Design Automation Conference
Code compression for performance enhancement of variable-length embedded processors
ACM Transactions on Embedded Computing Systems (TECS)
Access pattern-based code compression for memory-constrained systems
ACM Transactions on Design Automation of Electronic Systems (TODAES)
A universal placement technique of compressed instructions for efficient parallel decompression
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
Efficient code compression for embedded processors
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
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Most of the work done in the field of machine code compression is for fixed length instruction encodings. In this work we apply code compression on variable length instruction set processors whose encodings are already optimized to a certain extent with respect to their usages. We develop a dictionary based algorithm which utilizes unused encoding space of an instruction set architecture to encode code-words, and addresses issues arising out of variable length instructions. We test the algorithm with a RISC processor and include results for compression and performance in terms of cycle-counts and memory accesses respectively. We also present an efficient scheme for searching relocated branch addresses and analyze its performance.