Text compression
Executing compressed programs on an embedded RISC architecture
MICRO 25 Proceedings of the 25th annual international symposium on Microarchitecture
An object code compression approach to embedded processors
ISLPED '97 Proceedings of the 1997 international symposium on Low power electronics and design
Improving code density using compression techniques
MICRO 30 Proceedings of the 30th annual ACM/IEEE international symposium on Microarchitecture
Cached-code compression for energy minimization in embedded processors
ISLPED '01 Proceedings of the 2001 international symposium on Low power electronics and design
Design of an one-cycle decompression hardware for performance increase in embedded systems
Proceedings of the 39th annual Design Automation Conference
Space- and Time-Efficient Decoding with Canonical Huffman Trees
CPM '97 Proceedings of the 8th Annual Symposium on Combinatorial Pattern Matching
Decoding of Canonical Huffman Codes with Look-Up Tables
DCC '00 Proceedings of the Conference on Data Compression
DISE: a programmable macro engine for customizing applications
Proceedings of the 30th annual international symposium on Computer architecture
A Unified Architecture for Adaptive Compression of Data and Code on Embedded Systems
VLSID '05 Proceedings of the 18th International Conference on VLSI Design held jointly with 4th International Conference on Embedded Systems Design
Dictionary Based Code Compression for Variable Length Instruction Encodings
VLSID '05 Proceedings of the 18th International Conference on VLSI Design held jointly with 4th International Conference on Embedded Systems Design
Using Lin-Kernighan algorithm for look-up table compression to improve code density
GLSVLSI '06 Proceedings of the 16th ACM Great Lakes symposium on VLSI
MiBench: A free, commercially representative embedded benchmark suite
WWC '01 Proceedings of the Workload Characterization, 2001. WWC-4. 2001 IEEE International Workshop
Efficient code density through look-up table compression
Proceedings of the conference on Design, automation and test in Europe
Automotive software and systems engineering
MEMOCODE '05 Proceedings of the 2nd ACM/IEEE International Conference on Formal Methods and Models for Co-Design
SAMC: a code compression algorithm for embedded processors
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
Instruction re-encoding facilitating dense embedded code
Proceedings of the conference on Design, automation and test in Europe
Huffman-based code compression techniques for embedded processors
ACM Transactions on Design Automation of Electronic Systems (TODAES)
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The size of embedded software is rising at a rapid pace. It is often challenging and time consuming to fit an amount of required software functionality within a given hardware resource budget. Code compression is a means to alleviate the problem. In this paper we introduce a novel and efficient hardware-supported approach. Our scheme reduces the size of the generated decoding table by splitting instructions into portions of varying size (called patterns) before Huffman Coding compression is applied. It improves the final compression ratio (including all overhead that incurs) by more than 20% compared to known schemes based on Huffman Coding. We achieve allover compression ratios as low as 44%. Thereby, our scheme is orthogonal to approaches that take particularities of a certain instruction set architectures into account. We have conducted evaluations using a representative set of applications and have applied it to two major embedded processors, namely ARM and MIPS.