A code decompression architecture for VLIW processors
Proceedings of the 34th annual ACM/IEEE international symposium on Microarchitecture
Code compression for VLIW processors using variable-to-fixed coding
Proceedings of the 15th international symposium on System Synthesis
The performance advantage of applying compression to the memory system
Proceedings of the 2002 workshop on Memory system performance
A Decompression Architecture for Low Power Embedded Systems
ICCD '00 Proceedings of the 2000 IEEE International Conference on Computer Design: VLSI in Computers & Processors
Survey of code-size reduction methods
ACM Computing Surveys (CSUR)
Heap compression for memory-constrained Java environments
OOPSLA '03 Proceedings of the 18th annual ACM SIGPLAN conference on Object-oriented programing, systems, languages, and applications
Compressing MIPS code by multiple operand dependencies
ACM Transactions on Embedded Computing Systems (TECS)
Compiler optimization and ordering effects on VLIW code compression
Proceedings of the 2003 international conference on Compilers, architecture and synthesis for embedded systems
LZW-Based Code Compression for VLIW Embedded Systems
Proceedings of the conference on Design, automation and test in Europe - Volume 3
Multi-profile based code compression
Proceedings of the 41st annual Design Automation Conference
A New Algorithm for Energy-Driven Data Compression in VLIW Embedded Processors
DATE '03 Proceedings of the conference on Design, Automation and Test in Europe - Volume 1
Exploiting frequent field values in java objects for reducing heap memory requirements
Proceedings of the 1st ACM/USENIX international conference on Virtual execution environments
A code compression advisory tool for embedded processors
Proceedings of the 2005 ACM symposium on Applied computing
A bitmask-based code compression technique for embedded systems
Proceedings of the 2006 IEEE/ACM international conference on Computer-aided design
Proceedings of the conference on Design, automation and test in Europe
Revisiting Java Bytecode Compression for Embedded and Mobile Computing Environments
IEEE Transactions on Software Engineering
Instruction splitting for efficient code compression
Proceedings of the 44th annual Design Automation Conference
ASIP instruction encoding for energy and area reduction
Proceedings of the 44th annual Design Automation Conference
Code compression for performance enhancement of variable-length embedded processors
ACM Transactions on Embedded Computing Systems (TECS)
Proceedings of the 18th ACM Great Lakes symposium on VLSI
Code compression for VLIW embedded systems using a self-generating table
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
COMPASS - A tool for evaluation of compression strategies for embedded processors
Journal of Systems Architecture: the EUROMICRO Journal
Code decompression unit design for VLIW embedded processors
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
A universal placement technique of compressed instructions for efficient parallel decompression
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
Code density concerns for new architectures
ICCD'09 Proceedings of the 2009 IEEE international conference on Computer design
Huffman-based code compression techniques for embedded processors
ACM Transactions on Design Automation of Electronic Systems (TODAES)
Code compression for embedded VLIW processors using variable-to-fixed coding
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
Approximate arithmetic coding for bus transition reduction in low power designs
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
Study on LZW algorithm for embedded instruction memory
IMCAS'06 Proceedings of the 5th WSEAS international conference on Instrumentation, measurement, circuits and systems
Efficient code compression for embedded processors
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
An embedded systems programming environment for c
Euro-Par'06 Proceedings of the 12th international conference on Parallel Processing
Microprocessors & Microsystems
TinyVM: an energy-efficient execution infrastructure for sensor networks
Software—Practice & Experience
Bitmask aware compression of NISC control words
Integration, the VLSI Journal
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In this paper, we present a method for reducing the memory requirements of an embedded system by using code compression. We compress the instruction segment of the executable running on the embedded system, and we show how to design a run-time decompression unit to decompress code on the fly before execution. Our algorithm uses arithmetic coding in combination with a Markov model, which is adapted to the instruction set and the application. We provide experimental results on two architectures, Analog Devices' Share and ARM's ARM and Thumb instruction sets, and show that programs can often be reduced by more than 50%. Furthermore, we suggest a table-based design that allows multibit decoding to speed up decompression