Compressing MIPS code by multiple operand dependencies

  • Authors:
  • Kelvin Lin;Chung-Ping Chung;Jean Jyh-Jiun Shann

  • Affiliations:
  • National Chiao Tung University, HsinChu, Taiwan;National Chiao Tung University, HsinChu, Taiwan;National Chiao Tung University, HsinChu, Taiwan

  • Venue:
  • ACM Transactions on Embedded Computing Systems (TECS)
  • Year:
  • 2003

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Abstract

Intuitively, destination registers of some instructions have great possibilities to be used as the source registers of the immediately subsequent instructions. Such destination register/source register pairs have been exploited previously to improve code compression ratio [compression ratio = (Dictionary Size + Encoded Program Size)/Original Program Size]. This paper further examines the exploitation of both register and immediate operand dependencies to improve the compression ratio. A mapping tag is used to flag dependency relationships so that dependent operands can be omitted during compression. The compression ratio is enhanced by both the removal of dependent operands and the sharing of mapping tags between different types of dependencies and between different instructions. Simulation results show that the proposed method results in the best compression ratio achieved so far, giving average compression ratios of 33.8% for MediaBench benchmarks and 33.6% for SPEC95 benchmarks, both compiled for a MIPS R2000 processor.