A Unified Architecture for Adaptive Compression of Data and Code on Embedded Systems

  • Authors:
  • Haris Lekatsas;Jorg Henkel;Venkata Jakkula;Srimat Chakradhar

  • Affiliations:
  • NEC Laboratories America, Inc.;NEC Laboratories America, Inc.;NEC Laboratories America, Inc.;NEC Laboratories America, Inc.

  • Venue:
  • VLSID '05 Proceedings of the 18th International Conference on VLSI Design held jointly with 4th International Conference on Embedded Systems Design
  • Year:
  • 2005

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Abstract

We present an architecture for compression/decompression of executable files running on embedded systems. Compression is important for memory reduction purposes; previous work on memory reduction for embedded systems has focused on compressing the instruction segment of executable code before execution and decompressing at runtime. Our work has shown that solely compressing the instruction segment is not enough as in many cases executable files contain large data areas that would benefit from compression as well. Compressing data areas presents new challenges to the embedded system designer; data can be modified during execution and therefore a fast compression algorithm and intelligent memory management are required as well. We propose a novel compression/decompression framework that can handle both instructions and data and show memory reductions over 50% while keeping performance degradation within 12%.