Process variation aware cache leakage management
Proceedings of the 2006 international symposium on Low power electronics and design
Variation-tolerant dynamic power management at the system-level
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
Dynamic clock stretching for variation compensation in VLSI circuit design
ACM Journal on Emerging Technologies in Computing Systems (JETC)
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Power is emerging as the next grand challenge in integrated circuit design. Impact of increasing power consumption can be seen from handheld device all the way to design of high end server microprocessors. Total power consumption is increasingly governed by exponentially increasing leakage power in newer process technologies. Along with increase in power consumption, the industry is also facing growing issues with inherent environmental and process variations.This growing variability has a tremendous impact on power and power variability. In this paper, we review various issues with power variability and its impact on design.