Performance Driven Decoupling Capacitor Allocation Considering Data and Clock Interactions

  • Authors:
  • Ajith Chandy;Tom Chen

  • Affiliations:
  • Colorado State University, USA;Colorado State University, USA

  • Venue:
  • Proceedings of the conference on Design, Automation and Test in Europe - Volume 2
  • Year:
  • 2005

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Abstract

We propose a sensitivity-based method to allocate decaps incorporating leakage constraints and tighter data and clock interactions. The proposed approach attempts to allocate decaps not only based on the power grid integrity criteria, but also based on the impact of power grid noise on timing criticality and robustness. The resulting algorithm reduces the power grid noise to below a threshold and improves the performance or timing robustness of the circuit at the same time.