Real and complex analysis, 3rd ed.
Real and complex analysis, 3rd ed.
RICE: Rapid interconnect circuit evaluator
DAC '91 Proceedings of the 28th ACM/IEEE Design Automation Conference
Power and ground network topology optimization for cell based VLSIs
DAC '92 Proceedings of the 29th ACM/IEEE Design Automation Conference
Power supply noise analysis methodology for deep-submicron VLSI chip design
DAC '97 Proceedings of the 34th annual Design Automation Conference
Proceedings of the 36th annual ACM/IEEE Design Automation Conference
PRIMA: passive reduced-order interconnect macromodeling algorithm
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
Hierarchical power supply noise evaluation for early power grid design prediction
Proceedings of the 2001 international workshop on System-level interconnect prediction
Decoupling capacitance allocation for power supply noise suppression
Proceedings of the 2001 international symposium on Physical design
Fast power/ground network optimization based on equivalent circuit modeling
Proceedings of the 38th annual Design Automation Conference
An algorithm for optimal decoupling capacitor sizing and placement for standard cell layouts
Proceedings of the 2002 international symposium on Physical design
Congestion-driven codesign of power and signal networks
Proceedings of the 39th annual Design Automation Conference
Modeling and analysis of regular symmetrically structured power/ground distribution networks
Proceedings of the 39th annual Design Automation Conference
Hybrid structured clock network construction
Proceedings of the 2001 IEEE/ACM international conference on Computer-aided design
Analysis and Optimization of Power Grids
IEEE Design & Test
Power Supply Noise Aware Floorplanning and Decoupling Capacitance Placement
ASP-DAC '02 Proceedings of the 2002 Asia and South Pacific Design Automation Conference
Thermal and Power Integrity Based Power/Ground Networks Optimization
Proceedings of the conference on Design, automation and test in Europe - Volume 2
Topology optimization of structured power/ground networks
Proceedings of the 2004 international symposium on Physical design
Efficient power/ground network analysis for power integrity-driven design methodology
Proceedings of the 41st annual Design Automation Conference
Proceedings of the 2003 IEEE/ACM international conference on Computer-aided design
Optimal planning for mesh-based power distribution
Proceedings of the 2004 Asia and South Pacific Design Automation Conference
A fast decoupling capacitor budgeting algorithm for robust on-chip power delivery
Proceedings of the 2004 Asia and South Pacific Design Automation Conference
Performance Driven Decoupling Capacitor Allocation Considering Data and Clock Interactions
Proceedings of the conference on Design, Automation and Test in Europe - Volume 2
Power Supply Noise-Aware Scheduling and Allocation for DSP Synthesis
ISQED '05 Proceedings of the 6th International Symposium on Quality of Electronic Design
A fast algorithm for power grid design
Proceedings of the 2005 international symposium on Physical design
SPIDER: simultaneous post-layout IR-drop and metal density enhancement with redundant fill
ICCAD '05 Proceedings of the 2005 IEEE/ACM International conference on Computer-aided design
A novel technique for incremental analysis of on-chip power distribution networks
Proceedings of the 2007 IEEE/ACM international conference on Computer-aided design
Optimization of via distribution and stacked via in multi-layered P/G networks
Integration, the VLSI Journal
Reliability analysis and optimization of power-gated ICs
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
Proceedings of the Conference on Design, Automation and Test in Europe
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This paper presents an efficient method for optimizing power/ground (P/G) networks. It proposes a structured skeleton that is intermediate to the conventional method that uses full meshes (which are hard to analyze efficiently), and tree-structured P/G networks (which provide poor performance). As an example, we consider a P/G network structure modeled as an overlying mesh with underlying trees originating from the mesh, which eases the task of analysis with acceptable performance sacrifices. A fast and efficient event-driven P/G network simulator is proposed, which hierarchically simulates the P/G network with an adaptation of PRIMA to handle non-zero initial conditions. An adjoint network that incorporates the variable topology of the original P/G network, as elements switch in and out of the network, is constructed to calculate the transient adjoint sensitivity over multiple intervals. These are used to drive a sensitivity-based heuristic optimization method. Experimental results show that this procedure can be used to efficiently optimize large networks.