Optimization of via distribution and stacked via in multi-layered P/G networks

Authors:
Yici Cai;Jin Shi;Shuai Li
Affiliations:
EDA Lab, Department of Computer Science and Technology, Tsinghua University, China;EDA Lab, Department of Computer Science and Technology, Tsinghua University, China;EDA Lab, Department of Computer Science and Technology, Tsinghua University, China
Venue:
Integration, the VLSI Journal
Year:
2010

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Abstract

The usage of via stack was not carefully studied in previous multi-layered P/G (Power/Ground) network designs. However, with feature size scaling down, the resistance of via is increasing quickly and their influence on voltage drop of P/G networks has become obvious. In this paper, two optimization techniques for via placement are proposed, which are proved to be helpful in reducing on die voltage drop. Firstly, an efficient heuristic algorithm based on sensitivity analysis is presented to optimize via distribution in early design stage. Compared with even distribution design strategies, averagely the heuristic algorithm can reduce the worst voltage drop by 8.43% without adding more vias. Secondly, experiments demonstrated that using stacked vias in nonadjacent layers is powerful in eliminating ''hot'' areas which suffer from large voltage drop. Based on this observation, a heuristic algorithm is developed to further reduce the worst voltage drop. Experiments show that voltage drop distribution can be well optimized by combining these two strategies together.