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Proceedings of the 2006 IEEE/ACM international conference on Computer-aided design
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Skew-aware polarity assignment in clock tree
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Clock buffer polarity assignment for power noise reduction
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Editor's note:As the complexity of power and ground networks increases, methods for efficient analysis and aggressive optimization of these networks become essential. Here, the authors describe efficient hierarchical methods for analyzing distribution networks. To optimize the networks, the authors call for techniques that reduce noise on the power grid, including topology selection, wire widening, and decoupling-capacitance insertion, combined with supply, signal, and clock network codesign.ýSoha Hassoun, Tufts University