Exact moment matching model of transmission lines and application to interconnect delay estimation
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
PRIMA: passive reduced-order interconnect macromodeling algorithm
ICCAD '97 Proceedings of the 1997 IEEE/ACM international conference on Computer-aided design
Interconnect layout optimization under higher-order RLC model
ICCAD '97 Proceedings of the 1997 IEEE/ACM international conference on Computer-aided design
Hierarchical analysis of power distribution networks
Proceedings of the 37th Annual Design Automation Conference
Extended Krylov subspace method for reduced order analysis of linear circuits with multiple sources
Proceedings of the 37th Annual Design Automation Conference
Hierarchical model order reduction for signal-integrity interconnect synthesis
GLSVLSI '01 Proceedings of the 11th Great Lakes symposium on VLSI
Efficient large-scale power grid analysis based on preconditioned krylov-subspace iterative methods
Proceedings of the 38th annual Design Automation Conference
Efficient linear circuit analysis by Pade approximation via the Lanczos process
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
Power network analysis using an adaptive algebraic multigrid approach
Proceedings of the 40th annual Design Automation Conference
Analysis and Optimization of Power Grids
IEEE Design & Test
SuPREME: Substrate and Power-delivery Reluctance-Enhanced Macromodel Evaluation
Proceedings of the 2003 IEEE/ACM international conference on Computer-aided design
A fast decoupling capacitor budgeting algorithm for robust on-chip power delivery
Proceedings of the 2004 Asia and South Pacific Design Automation Conference
Relaxed hierarchical power/ground grid analysis
Proceedings of the 2005 Asia and South Pacific Design Automation Conference
Journal of Computer Science and Technology
Large scale P/G grid transient simulation using hierarchical relaxed approach
Integration, the VLSI Journal
Modeling and simulation for on-chip power grid networks by locally dominant Krylov subspace method
Proceedings of the 2008 IEEE/ACM International Conference on Computer-Aided Design
Electromigration study of power-gated grids
Proceedings of the 14th ACM/IEEE international symposium on Low power electronics and design
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This paper proposes a general hierarchical analysis methodology, HiPRIME, to efficiently analyze RLKC power delivery systems. After partitioning the circuits into blocks, we develop and apply the IEKS (Improved Extended Krylov Subspace) method to build the Multi-port Norton Equivalent circuits which transform all the internal sources to Norton current sources at ports. Since there is no active elements inside the Norton circuits, passive or realizable model order reduction techniques such as PRIMA can be applied. To further reduce the top-level hierarchy runtime, we develop a second-level model reduction algorithm and prove its passivity. Experimental results show 400-700X runtime improvement with less than 0.2% error.