Electrothermal analysis of VLSI systems
Electrothermal analysis of VLSI systems
Proceedings of the 39th annual Design Automation Conference
Power Grid Modeling Technique for Hierarchical Power Network Analysis
ISQED '01 Proceedings of the 2nd International Symposium on Quality Electronic Design
HRM - A Hierarchical Simulator for Full-Chip Power Network Reliability Analysis
ISQED '01 Proceedings of the 2nd International Symposium on Quality Electronic Design
Electromigration-Aware Physical Design of Integrated Circuits
VLSID '05 Proceedings of the 18th International Conference on VLSI Design held jointly with 4th International Conference on Embedded Systems Design
Relaxed hierarchical power/ground grid analysis
Proceedings of the 2005 Asia and South Pacific Design Automation Conference
Analysis and optimization of power-gated ICs with multiple power gating configurations
Proceedings of the 2007 IEEE/ACM international conference on Computer-aided design
Vertical via design techniques for multi-layered P/G networks
Proceedings of the 2008 Asia and South Pacific Design Automation Conference
Efficient representation and analysis of power grids
Proceedings of the conference on Design, automation and test in Europe
Hierarchical analysis of power distribution networks
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
Fast and Optimal Redundant Via Insertion
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
WiT: optimal wiring topology for electromigration avoidance
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
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We present a reliability study of power grids in power-gated chips. We investigate those conditions that cause electromigration (EM) problems on the top metal layers as well as in local power grid meshes. Also, we identify the potential EM constraint violating branches and vias by observing their current flow under various power gating conditions. Power supply noise, process and thermal variations are some of the factors that can also affect EM in power grid branches and vias. Our study shows that a power grid network optimized for all blocks working may experience EM problems when power gating is applied.