Relaxed hierarchical power/ground grid analysis

Authors:
Yici Cai;Zhu Pan;Shelton X-D Tan;Xianlong Hong;Wenting Hou;Lifeng Wu
Affiliations:
Tsinghua University, Beijing, P.R.China;Tsinghua University, Beijing, P.R.China;University of California at Riverside, Riverside CA;Tsinghua University, Beijing, P.R.China;Cadence Design Systems, CA;Cadence Design Systems, CA
Venue:
Proceedings of the 2005 Asia and South Pacific Design Automation Conference
Year:
2005

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Abstract

This paper proposes a novel hierarchical approach to the efficient analysis of large VLSI power/ground grids. Different from the existing hierarchical approach where sub-circuit equivalent models are sparsified with computation-intensive integer programming and the resulting modeling may lead to larger errors if the top circuit matrix has large condition number, the new approach employs an iterative (relaxation) procedure to explicitly compensate the errors and avoid introducing dense matrix caused by the circuit reduction. We also propose an efficient scheme for partitioning high performance center-bumped P/G grids. Experimental results demonstrate that the new algorithm is more accurate than the existing hierarchical method while delivering more speedup over the flat simulators.